| fixed Project Status (11/29/2012 - 10:06:46) | |||
| Project File: | fixed.xise | Parser Errors: | No Errors |
| Module Name: | multiplier | Implementation State: | Synthesized |
| Target Device: | xc6slx45t-3fgg484 |
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No Errors |
| Product Version: | ISE 14.3 |
|
3 Warnings (3 new) |
| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: | System Settings |
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| Device Utilization Summary (estimated values) | [-] | |||
| Logic Utilization | Used | Available | Utilization | |
| Number of Slice Registers | 135 | 54576 | 0% | |
| Number of Slice LUTs | 132 | 27288 | 0% | |
| Number of fully used LUT-FF pairs | 51 | 216 | 23% | |
| Number of bonded IOBs | 131 | 296 | 44% | |
| Number of BUFG/BUFGCTRLs | 1 | 16 | 6% | |
| Number of DSP48A1s | 1 | 58 | 1% | |
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | št 29. XI 10:06:45 2012 | 0 | 3 Warnings (3 new) | 0 | |
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| ISIM Simulator Log | Out of Date | št 29. XI 09:51:45 2012 | |